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for further information contact your local stmicroelectronics sales office. april 2014 docid025726 rev 3 1/21 STA8090FG fully integrated gps/galileo/glonass/beidou/qzss receiver with embedded rf and in-package flash data brief features ? stmicroelectronics ? positioning receiver with 48 tracking channels and 2 fast acquisition channels supporting gps, galileo, glonass, beidou and qzss systems ? single die standalone receiver embedding rf front-end and low noise amplifier ? -162 dbm indoor sensitivity (tracking mode) ? fast ttff < 1 s in hot start and 30 s in cold start ? high performance arm946 mcu (up to 196 mhz) ? 256 kbyte embedded sram ? in-package sqi flash memory (16 mbits) ? real time clock (rtc) circuit ? 32-bit watch-dog timer ? 3 uarts ? 1 i 2 c master/slave interface ? 1 synchronous serial port (ssp, motorola-spi supported) ? usb2.0 full speed (12 mhz) with integrated physical layer transceiver ? 2 controller area network (can) ? 2 channels adc (10 bits) ? power management unit (pmu) embedding switching regulator ? operating condition: ? main voltage regulator (v inl ): 1.6v to 4.3v ? backup voltage (v inb ): 1.6v to 4.3v ? digital voltage (v dd ): 1.2 v 10% ? rf core voltage (v cc ): 1.2 v 10% ? io ring voltage (v ddio ): 1.8 v 5% or 3.3 v 10% ? package: ? tfbga99 (5 x 6 x 1.2 mm) 0.5 mm pitch ? ambient temperature range: -40/+85c description STA8090FG is a single die standalone positioning receiver ic working on multiple constellations (gps/galileo/glonass/beidou/qzss). the minimal bom makes STA8090FG the ideal solution for cost competitive and small footprint products such as trackers, telematics, portable, tablets, marine and sports accessories. the device is offered with a complete gnss firmware which performs all gnss operations including tracking, acquisition, navigation and data output with no need of external memories. 5'#(" yynn
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contents STA8090FG 2/21 docid025726 rev 3 contents 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 tfbga99 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 power supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 main function pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 test/emulated dedicated pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.6 communication interface pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.7 multimedia card pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.8 general purpose pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.9 rf front-end pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.2 tfbga99 5 x 6 x 1.2 mm package information . . . . . . . . . . . . . . . . . . . . 17 4 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
docid025726 rev 3 3/21 STA8090FG list of tables 3 list of tables table 1. tfbga99 connection diagram (with can) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 2. tfbga99 connection diagram (no can) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 3. power supply pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 4. main function pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 5. test/emulated dedicated pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 6. communication interface pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 7. multimedia card pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 8. general purpose pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 9. rf front-end pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 10. tfbga99 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 7 table 11. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
list of figures STA8090FG 4/21 docid025726 rev 3 list of figures figure 1. STA8090FG system block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. tfbga99 5 x 6 x 1.2 mm package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 3. ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
docid025726 rev 3 5/21 STA8090FG overview 20 1 overview STA8090FG is a highly integrated single-chip standalone gnss receiver designed for positioning system applications. STA8090FG embeds the new st gnss positioning engine capable of receiving signals from multiple satellite navigation systems, including the us gps, european galileo, russia's glonass, chinese beidou and japan's qzss. the STA8090FG ability of tracking simultaneously the signals from multiple satellites regardless of their constellation, make this chip capable of delivering exceptional accuracy in urban canyons and in the environments where buildings and other obstructions make satellite visibility challenging. STA8090FG embeds innovative power management with switching regulator for power consumption optimization. the extended voltage supply range from 1.6 v to 4.3 v, the 1.8 v and 3.3 v i/o compliance support make the STA8090FG the suitable solution for different user applications. the STA8090FG combines a high performance arm946 microprocessor with i/o capabilities and enhanced peripherals. it supports usb2.0 standard at full speed (12 mbps) with on-chip phy. the chip embeds backup logic with real time clock. the device is offered with a complete firmware performing all positioning operations including acquisition, tracking, navigation and data output with no need of external memories. the STA8090FG, using stmicroelectronics cmosrf technology, is housed in a tfbga99 (5 x 6 x 1.2 mm) package with stacked 16 mbit flash memory.
pin description STA8090FG 6/21 docid025726 rev 3 2 pin description 2.1 block diagram figure 1. STA8090FG system block diagram $+% ,& 078 *3,2 :' %.b'rpdlq 26&, ,62 &(// $3% %ulgjh 35&& 57& %.5$0.% *%%&ruuhodwru (qjlqh *&,) **,) )dvw$ft &kdqqho 7un &kdqqhov 0x[ $ft 5$0v $3% %ulgjh &/2&.b*(1 7hvw frqwuroohu -7$* ,2v 9,& $50 ,&dfkh .% '&dfkh .% +,*+63((',7&0 .% +,*+63((''7&0 .% ,'6:,7&+$%/( [.% $3% *5),3 63,,) 5) 6hfwlrq /1$ 6hfwlrq $'& ** $'& *& 26&, 3// $qwhqqd 6hqvlqj 5lqj 26&, ,6 308 6036 /'2 /'2 %./'2 %dqgjds%ldv2vfloodwru/9'v $'& 8$57 5[7[ 8$57 )xoo 663 8$57 5[7[ 6'00& $3% %ulgjh &$1 $3% %ulgjh &$1 ()7 )/$6+ 0e 86% ,) 64, ,) ("1($'5
docid025726 rev 3 7/21 STA8090FG pin description 20 2.2 tfbga99 pin configuration table 1. tfbga99 connection diagram (with can) 1234567 89 a vinm vinm spi_clk spi_csn vinl1 vol1 gnd vinb vob b vlx vlx spi_di uart0_ tx uart0_ cts uart2_ rx gpio1 gpio0 gnd c gnd gnd spi_do vddio_ r1 uart2_ tx uart0_ rts vdd_sqi vdd_ adc reserved d vom gnd tms uart0_ dsr uart0_ dtr gnd adc_in2 gnd rtc_xto e vdd_ana tdo trstn uart0_ dcd vddd uart0_ rx adc_in1 wakeup0 rtc_xti f gnd tdi vddd vddd gnd gnd wakeup1 stdbyn rstn g usb_dp tck vddd gnd gnd gnd stdby_ out pmu_ cfg xtal_ out h usb_dm gpio10 mmc_d3 mmc_ clk tp_if_n gnd gnd vcc_pll xtal_in j can0_tx gpio11 mmc_d2 mmc_ cmd tp_if_p gnd gnd ant_ sense2 vcc_ chain k can0_rx vddio_ r2 gpio2 mmc_d1 gnd gnd gnd gnd_lna ant_ sense1 l gnd i2c_sd i2c_clk mmc_d0 vcc_rf lna_in vol2 vinl2 gnd
pin description STA8090FG 8/21 docid025726 rev 3 2.3 power supply pins table 2. tfbga99 connection diagram (no can) 1234567 89 a vinm vinm spi_clk spi_csn vinl1 vol1 gnd vinb vob b vlx vlx spi_di uart0_ tx uart0_ cts uart2_ rx gpio1 gpio0 gnd c gnd gnd spi_do vddio_ r1 uart2_ tx uart0_ rts vdd_sqi vdd_ adc reserved d vom gnd tms uart0_ dsr uart0_ dtr gnd adc_in2 gnd rtc_xto e vdd_ana tdo trstn uart0_ dcd vddd uart0_ rx adc_in1 wakeup0 rtc_xti f gnd tdi vddd vddd gnd gnd wakeup1 stdbyn rstn g usb_dp tck vddd gnd gnd gnd stdby_ out pmu_ cfg xtal_ out h usb_dm gpio10 mmc_d3 mmc_ clk tp_if_n gnd gnd vcc_pll xtal_in j uart0_ tx gpio11 mmc_d2 mmc_ cmd tp_if_p gnd gnd ant_ sense2 vcc_ chain k uart0_ rx vddio_ r2 gpio2 mmc_d1 gnd gnd gnd gnd_lna ant_ sense1 l gnd i2c_sd i2c_clk mmc_d0 vcc_rf lna_in vol2 vinl2 gnd table 3. power supply pins symbol i/o voltage i/o description STA8090FG vcc_pll 1.2 v pwr analog supply voltage for pll rf (1.2v) h8 vcc_chain 1.2 v pwr analog supply voltage for rf chain (1.2v) j9 vcc_rf 1.2 v pwr analog supply voltage for rf (1.2v) l5 vdd_adc 1.8 v pwr digital supply voltage for adc (1.8v) c8 vdd_sqi 1.8 v pwr digital supply voltage for sqi c7 vddd 1.1 v pwr digital supply voltage. this value can be configured to 1.0 v, 1.1 v (default) or 1.2 v e5, f3, f4, g3 vddio_r1 1.8 v or 3.3 v pwr digital supply voltage for i/o ring 1 (1.8 v or 3.3 v) c4 vddio_r2 3.3v pwr digital supply voltage for i/o ring 2 (3.3 v) k2 vinb 1.6 v - 4.3 v pwr backup ldo input supply voltage (1.6 v to 4.3 v) a8 vinl1 1.6 v - 4.3 v pwr ldo1 input supply voltage (1.6 v to 4.3 v) a5
docid025726 rev 3 9/21 STA8090FG pin description 20 2.4 main function pins vinl2 1.6 v - 4.3 v pwr ldo2 input supply voltage (1.6 v to 4.3 v) l8 vinm 1.6 v - 4.3 v pwr smps coil input supply (1.6 v to 4.3 v) a1, a2 vdd_ana 1.6 v - 4.3 v pwr smps input supply (1.6 v to 4.3 v) e1 vlx 0 v - 4.3 v pwr smps coil output b1, b2 vob 1.0v pwr ldo backup output voltage (1.0 v) a9 vol1 1.1 v or 1.8 v pwr ldo1 output voltage: pmu_cfg = high -> 1.1 v (it can be also configured to 1.0 v or 1.2 v) pmu_cfg = low -> 1.8 v a6 vol2 1.2 v pwr ldo2 output voltage (1.2 v) l7 vom 1.1 v or 1.8 v pwr smps output voltage pmu_cfg = high -> 1.8 v pmu_cfg = low -> 1.1 v (it can be also configured to 1.0 v or 1.2 v) d1 gnd gnd gnd ground a7, b9, c1, c2, d2, d6, d8, f1, f5, f6, g4, g5, g6, h6, h7, j6, j7, k5, k6, k8, l1, l9 gnd_lna gnd gnd ground k7 table 3. power supply pins (continued) symbol i/o voltage i/o description STA8090FG table 4. main function pins symbol i/o voltage i/o description STA8090FG adc_in1 1.4 v ? 0 v typ range i adc analog input [1] e7 adc_in2 1.4 v ? 0 v typ range i adc analog input [1] d7 pmu_cfg 1.0 v i power management unit config pin high -> vol1 = 1.1 v, vom = 1.8 v low -> vol1 = 1.8 v, vom = 1.1 v g8 rstn 1.0 v i reset input with schmitt-trigger characteristics and noise filter. f9 rtc_xti 1.4 v (max) i input of the 32 khz oscillator amplifier circuit and input of the internal real time clock circuit. e9 rtc_xto 1.4 v (max) o output of the oscillator amplifier circuit. d9 stdb_out 1.0 v o when low, indicates the chip is in standby mode g7
pin description STA8090FG 10/21 docid025726 rev 3 2.5 test/emulated dedicated pins 2.6 communication interface pins stdbyn 1.0 v i when low, the chip is forced in standby mode - all pins in high impedance except the ones powered by backup supply f8 wakeup0 1.0 v i wakeup from standby mode e8 wakeup1 1.0 v i wakeup from standby mode f7 table 4. main function pins (continued) symbol i/o voltage i/o description STA8090FG table 5. test/emulated dedicated pins symbol i/o voltage i/o description STA8090FG tck vddio_r2 i jtag test clock g2 tdi vddio_r2 i jtag test data in / boot3 f2 tdo vddio_r2 o jtag test data out e2 tms vddio_r2 i jtag test mode select / boot2 d3 tp_if_n 1.2 v o diff.test point for if ? neg. h5 tp_if_p 1.2 v o diff.test point for if . pos. j5 trstn (1) vddio_r2 i jtag test circuit reset e3 1. if jtag interface is not used, pin trstn must be asserted low. table 6. communication interface pins symbol i/o voltage i/o alternative function function description STA8090FG can0_rx (1) vddio_r2 i af0 (default) can0_rx can0 receive data input k1 i af1 uart0_rx uart0 rx data iaf2 tsense external temperature capture port i/o af3 i2c_sd i2c serial data can0_tx (1) vddio_r2 o af0 (default) can0_tx can0 transmit data output j1 o af1 uart0_tx uart0 tx data i/o af2 gpio7 general purpose i/o #7 o af3 i2c_clk i2c clock
docid025726 rev 3 11/21 STA8090FG pin description 20 i2c_clk vddio_r2 o af0 (default) i2c_clk i2c clock l3 i/o af1 gpio8 general purpose i/o #8 o af2 can1_tx (1) can1 transmit data output o af3 spi_csn spi chip select active low i2c_sd vddio_r2 i/o af0 (default) i2c_sd i2c serial data l2 i/o af1 gpio9 general purpose i/o #9 i af2 can1_rx (1) can1 receive data input i af3 sqi cen sqi flash chip enable spi_do vddio_r1 o af0 (default) spi_do spi serial data output c3 i/o af1 gpio27 general purpose i/o #27 i/o af2 sqi_sio0/si sqi flash data io 1 / ser. o i/o af3 mmc_d1 multimedia card data 1 spi_clk vddio_r1 o af0 (default) spi_clk spi clock a3 i/o af1 gpio25 general purpose i/o #25 o af2 sqi_clk sqi flash clock o af3 mmc_clk multimedia clock line spi_csn vddio_r1 o af0 (default) spi_csn spi chip select active low / io_power sel ring 1 a4 i/o af1 gpio24 general purpose i/o #24 i af2 sqi cen sqi flash chip enable i/o af3 mmc_cmd multimedia card command line spi_di vddio_r1 i af0 (default) spi_di spi serial data input b3 i/o af1 gpio26 general purpose i/o #26 i/o af2 sqi_sio1/so sqi flash data io 0 / ser. i i/o af3 mmc_d0 multimedia card data 0 uart0_cts vddio_r1 i af0 (default) uart0_cts uart0 clear to send b5 i/o af1 gpio15 general purpose i/o #15 oaf2 mspout s_clock msp serial clock output o af3 clock gnss gnss clock out table 6. communication interface pins (continued) symbol i/o voltage i/o alternative function function description STA8090FG
pin description STA8090FG 12/21 docid025726 rev 3 uart0_dcd vddio_r1 i af0 (default) uart0_dcd uart0 data carrier detect e4 i/o af1 gpio17 general purpose i/o #17 o af2 mspout sdata msp serial data output o af3 clock gnss gnss clock out uart0_dsr vddio_r1 i af0 (default) uart0_dsr uart0 data set ready d4 i/o af1 gpio16 general purpose i/o #16 o af2 mspout lrclk msp left/right clock output o af3 sign gc glonass and beidou 3-bit coding output (sign) uart0_rts vddio_r1 o af0 (default) uart0_rts uart0 request to send c6 i/o af1 gpio14 general purpose i/o #14 o af2 tcxo_out tcxo out clock o af3 sign gg gps and galileo 3-bit coding output (sign) uart0_dtr vddio_r1 o af0 (default) uart0_dtr uart0 data terminal read d5 i/o af1 gpio18 general purpose i/o #18 i af2 timer_icapa extended function timer - input capture a o af3 mag_1 gg gps and galileo 3-bit coding output (mag1) uart0_rx vddio_r1 i af0 (default) uart0_rx uart0 rx data e6 i/o af1 gpio30 general purpose i/o #30 i/o af2 sqi_sio2 sqi flash data io 2 i af3 timer_icapa extended function timer - input capture a uart0_tx vddio_r1 o af0 (default) uart0_tx uart0 tx data / boot1 b4 i/o af1 gpio31 general purpose i/o #31 i/o af2 sqi_sio3 sqi flash data io 3 o af3 timer_ocmpa extended function timer ? output compare a table 6. communication interface pins (continued) symbol i/o voltage i/o alternative function function description STA8090FG
docid025726 rev 3 13/21 STA8090FG pin description 20 2.7 multimedia card pins uart2_rx vddio_r1 i af0 (default) uart2_rx uart 2 rx data b6 i/o af1 gpio28 general purpose i/o #28 i/o af2 i2c_sd i2c serial data i/o af3 mmc_d2 multimedia card data 2 uart2_tx vddio_r1 o af0 (default) uart2_tx uart 2 tx data / boot0 c5 i/o af1 gpio29 general purpose i/o #29 o af2 i2c_clk i2c clock i/o af3 mmc_d3 multimedia card data 2 usb_dm vddio_r2 usb af0 (default) usb_dm usb d- signal h1 i af1 uart1_rx uart 1 rx data i af2 can1_rx (1) can1 receive data input i/o af3 i2c_sd i2c serial data usb_dp vddio_r2 usb af0 (default) usb_dp usb d+ signal g1 o af1 uart1_tx uart 1 tx data o af2 can1_tx (1) can1 transmit data output o af3 i2c_clk i2c clock 1. only for STA8090FGb. table 6. communication interface pins (continued) symbol i/o voltage i/o alternative function function description STA8090FG table 7. multimedia card pins symbol i/o voltage i/o alternative function function description STA8090FG mmc_clk vddio_r2 o af0 (default) mmc_clk multimedia clock line h4 o af1 mspout lrclk msp left/right clock output i af2 timer_icapa extended function timer - input capture a i/o af3 gpio4 general purpose i/o #4
pin description STA8090FG 14/21 docid025726 rev 3 mmc_cmd (1) vddio_r2 i/o af0 (default) mmc_cmd multimedia card command line j4 o af1 mspout sdata msp serial data output o af2 can0_tx (2) can0 transmit data output i/o af3 gpio5 general purpose i/o #5 mmc_d0 vddio_r2 i/o af0 (default) mmc_d0 multimedia card data 0 l4 o af1 mspouts_clock msp serial clock output i/o af2 i2c_sd i2c serial data i/o af3 gpio20 general purpose i/o #20 mmc_d1 vddio_r2 i/o af0 (default) mmc_d1 multimedia card data 1 k4 i af1 mspin_sdata msp serial data input oaf2 sign gc glonass and beidou 3-bit coding output (sign) i/o af3 gpio21 general purpose i/o #21 mmc_d2 vddio_r2 i/o af0 (default) mmc_d2 multimedia card data 2 j3 i af1 mspin_lrclk msp left/right clock input i af2 can0_rx (2) can0 receive data input iaf3 tsense external temperature capture port mmc_d3 vddio_r2 i/o af0 (default) mmc_d3 multimedia card data 2 h3 i af1 mspin_sclk msp serial clock input o af2 sign gg gps 3-bit coding output (sign) i/o af3 gpio23 general purpose i/o #23 1. a pull down must be present to enable arm real time debugging via jtag. 2. only for STA8090FGb. table 7. multimedia card pins (continued) symbol i/o voltage i/o alternative function function description STA8090FG
docid025726 rev 3 15/21 STA8090FG pin description 20 2.8 general purpose pins table 8. general purpose pins symbol i/o voltage i/o alternative function function description STA8090FG gpio0 vddio_r1 i/o af0 (default) gpio0 general purpose i/o #0 b8 i af1 pps_in pulse per second input o af2 timer_ocmpb extended function timer ? output compare b o af3 mag_0 gc glonass and beidou 3-bit coding output (mag0) gpio1 vddio_r1 i/o af0 (default) gpio1 general purpose i/o #1 b7 i af1 mspin_sdata msp serial data input o af2 pps_out pulse per second output i af3 tsense external temperature capture port gpio2 vddio_r2 i/o af0 (default) gpio2 general purpose i/o #2 k3 i af1 mspin_lrclk msp left/right clock input i af2 timer_icapb extended function timer - input capture b o af3 mag_1 gc glonass and beidou 3bit coding output (mag1) gpio10 vddio_r2 i/o af0 (default) gpio10 general purpose i/o #10 h2 i af2 timer_icapa extended function timer - input capture a o af3 timer_ocmpb extended function timer ? output compare b gpio11 vddio_r2 i/o af0 (default) gpio11 general purpose i/o #11 j2 o af2 timer_ocmpa extended function timer ? output compare a i af3 timer_icapb extended function timer - input capture b
pin description STA8090FG 16/21 docid025726 rev 3 2.9 rf front-end pins table 9. rf front-end pins symbol i/o voltage i/o description STA8090FG ant_sense1 3.3 v i antenna sensing input 1 k9 ant_sense2 3.3 v i antenna sensing input 2 j8 lna_in 1.2 v i low noise amplifier input l6 xtal_in 1.2 v i input side of crystal oscillator or tcxo input h9 xtal_out 1.2 v o output side of crystal oscillator g9
docid025726 rev 3 17/21 STA8090FG package and packing information 20 3 package and packing information 3.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 3.2 tfbga99 5 x 6 x 1.2 mm package information table 10. tfbga99 package dimensions symbol min. typ. max a 1.20 a1 0.15 a2 0.28 a4 0.60 b 0.25 0.30 0.35 d 5.85 6.00 6.15 d1 5.00 e 4.85 5.00 5.15 e1 4.00 e0.50 f0.50 ddd 0.08 eee 0.15 fff 0.05
package and packing information STA8090FG 18/21 docid025726 rev 3 figure 2. tfbga99 5 x 6 x 1.2 mm package dimension ("1($'5
docid025726 rev 3 19/21 STA8090FG ordering information 20 4 ordering information figure 3. ordering information scheme packing qualified grade/can bus tr = tape and reel = tray b = industrial grade (with can) = industrial grade (no can) sal with stacked flash STA8090FG tr b example code: family identifier
revision history STA8090FG 20/21 docid025726 rev 3 5 revision history table 11. document revision history date revision changes 18-dec-2013 1 initial release. 09-apr-2014 2 updated features list added following chapters: ? chapter 1: overview ? chapter 2: pin description ? chapter 3: package and packing information ? chapter 4: ordering information 10-apr-2014 3 table 5: test/emulated dedicated pins : ? trstn: added note table 7: multimedia card pins : ? mmc_cmd: added note
docid025726 rev 3 21/21 STA8090FG 21 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statem ents and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2014 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - swed en - switzerland - united kingdom - united states of america www.st.com

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